Publication
Design and FPGA-implementation of a high performance timing recovery loop for broadband communications
Year | 2009 |
Authors | |
Co-authors | V. Torres, A. Perez-Pascual, T. Sansaloni, J.Valls |
Journal | Journal of Signal Processing Systems |
Volume | 56 |
Number | 1 |
Pages | 17-23 |
Dates | Julio |
DOI | |
Research Groups |