Scheme for reducing the storage requirements of FFT twiddle factors on FPGAs

Year	2007
Authors	Javier Valls Coquillat
Co-authors	T. Sansaloni, A. Perez-Pascual, V. Torres, J.Valls
Journal	Journal of VLSI Signal Processing
Volume	47
Number	2
Pages	183-187
Dates	Mayo
DOI	http://dx.doi.org/10.1007/s11265-007-0055-8
Research Groups	Digital Systems Integration Group (GISED)