Reduction of power consumption in a Viterbi Decoder for OFDM-WLAN 2007 - Conferencias Javier Valls Coquillat
64-QAM 4×4 MIMO Decoders Based on Successive Projection Algorithm 2008 - Conferencias Vicenç Almenar Terré
FPGA-implementation of time-multiplexed multiple constant multiplication based on carry-save arithmetic 2009 - Conferencias Javier Valls Coquillat
Decoder for an Enhanced Serial Generalized Bit Flipping Algorithm 2012 - Conferencias Javier Valls Coquillat
High-Throughput FPGA-based Emulator for Structured LDPC Codes 2012 - Conferencias Javier Valls Coquillat
Fully-parallel LUT-based (2048,1723) LDPC Code Decoder for FPGA 2012 - Conferencias Javier Valls Coquillat
Optimisation of direct digital frequency synthesizers based on CORDIC 2001 - Revistas Javier Valls Coquillat
Area-Optimized Implementation of Quadrature Direct Digital Frequency Synthesizers on LUT-based FPGAs 2003 - Revistas Javier Valls Coquillat
Efficient FPGA-Implementation of two’s complement digit-serial/parallel multipliers 2003 - Revistas Javier Valls Coquillat
